1. Field of the Invention
The present invention relates to an electrode arrangement in a semiconductor element and, more particularly, to a surface mounted semiconductor device having a particular arrangement of electrodes for use in a hybrid integrated circuit or similar circuits.
2. Description of the Related Art
A conventional semiconductor device such as a hybrid integrated circuit having a discrete transistor 7 mounted as a surface of element on a substrate is shown, for example, in FIG. 17.
A discrete transistor of this type generally has, three to four protrusions (usually called bumps) formed of solder or the like on one which serve as electrodes. In one electrode configuration, four electrodes are provided for assembly stability. In this situation, an additional collector electrode 9 may be added to a three-bump discrete transistor (not shown) which has a collector electrode 8, a base electrode 10 and an emitter electrode 11. This additional collector electrode 9 works only to stabilize the mounting of the element, and is provided as the simplest way of fabricating the element.
That is, in a process for producing elements, the impurity-diffused region where the collector will be formed occupies as much diffusion area as possible on the surface of the element compared with other diffusion regions from the standpoint of dealing with a large electric current. Therefore, there has been proposed a configuration in which another collector electrode 9 is formed on an effective area in the impurity-diffused region of the collector to obtain a total of four electrodes, without requiring a change of the pattern on the element surface and contributing to improving efficiency. Therefore, this configuration has heretofore been employed as the simplest method in the step of producing elements.
Then, the discrete transistor 7, with a surface on which the electrodes are formed as a mounting surface, is mounted on a substrate 12 to form a hybrid integrated circuit as shown in FIG. 18.
Referring to the wiring on the substrate 12, when the wiring 10a to the base electrode 10 and the wiring 11a to the emitter electrode 11 are formed in the same direction, the wiring 10a must make a detour depending upon the configuration of the circuit, as described below. That is, the wiring must contain a jumper (not shown) like a lead or a 0-.OMEGA. chip resistor in the wiring 10a or 11a, or be formed by an upper conductor 15 on a lower conductor 13 insulated by an insulating glass 14.
The wiring in this case is determined by the positional relationship between the base electrode 10 and the emitter electrode 11. The jumper or the cross conductor is not needed when the wiring 11a is formed on the other side of the wiring 10a.
In the above-mentioned conventional semiconductor device, multi-layer wiring such as a jumper or a cross conductor is provided for the base line or for the emitter line when a semiconductor element having two collector electrodes, one base electrode and one emitter electrode that are suitably arranged, is mounted on a predetermined substrate and, particularly, when the wiring of the emitter electrode is formed as a wiring pattern on the substrate in the same direction as the wiring of the base electrode. Therefore, reliability is lost due to poor contact between the jumper and the occurrence of leakage in the multi-layer wiring, and the manufacturing cost is increased due to an increase in the number of parts and in the number of layers.